Question on PMode addressing

[sami]

Thank you for your big effort ..

in Demo 3 of the series, after :

- installing GDT
- Enabling A20
- Setting bit 0 of cr0

there is a far jump :

Code: Select all

jmp CODE_DESC:Stage3 ; far jump to fix CS

where CODE_DESC was defined to be 0x08

In the tutorial it says that PMode uses the Descriptor:Offset model but didn't explain further ..

my question here is :

What does the processor exactly do when it comes to that line i pointed above ..

[Mike]

Hello,

At that instruction, the processor just loads CS with 8, and eip to Stage3. The value in CS is an offset into the current Global Descriptor Table (in bytes) of the code selector (which is 8 bytes from start of GDT.) This is descriptor:offset addressing. The descriptor [in a segment register] is just an offset of the selector in the GDT, and the offset is the linear address that is being referenced.

[sami]

hi

i'm new here and to GDT ..

Are we going to have more than one descriptor table , for instance , one for each program or process and will have gdtr pointing to it ??

Did we choose CS to be 0x08 because our descriptor table is the first in the GDT , or is it fixed ??

what's confusing is that we started our program (stage2) in 16 bit and finished it with 32 bit !!

Thanks

[Andyhhp]

Are we going to have more than one descriptor table , for instance , one for each program or process and will have gdtr pointing to it ??

It is named the Global Descriptor Table for the reason that it is global to the entire computer. There is only ever 1 loaded.

There is a system known as Semented memory addressing (different to real mode segment:offset) that uses a Local Descriptor Table per process. However, in any modern system, Paged memory addressing is prefered over Segmented memory addressing for several reason. My personal favorite reason is that you do not need to have to defragment Paged memory when you need to load something big.

As a result, the GDT doesnt contain much in it if you use Paging. If you use this method (as the tutorials do) then all you need in your GDT in the end is:

Ring 0 Code and Data descriptor (for kernel usage)
Ring 3 Code and Data descriptor (for usermode usage - not covered yet in the tutorials)
A Task State Segment for each CPU (for the usermode programs to call kernel functions - again, not covered yet)

Did we choose CS to be 0x08 because our descriptor table is the first in the GDT , or is it fixed?

Yes. The code descriptor is the 2nd entry (after the null descriptor) with the data descriptor being the 3rd (at 0x10). You could just have easily put the data descriptor second and the code descriptor third in which case you would need to load 0x10 into the CS register rather than 0x08.

I hope this makes sense.

~Andrew